1. Field of the Invention
The present invention relates to the area of digital signal processing, and more particularly to an apparatus and a method for clock synchronization.
2. Description of Related Art
It well known that a clock signal is very important for a digital device. The digital device would not work properly without a clock signal as a time reference. Generally, the digital device is configured with a local clock generator for producing a plurality of local clocks with different clock frequencies according to a common source clock signal because the digital device may comprise a plurality of functional units, each works at different clock frequencies.
FIG. 1 shows an exemplary configuration of a conventional local clock generator 100. As shown in FIG. 1, the local clock generator 100 includes a clock controller 110 for generating a dividing coefficient depending on the frequency of a source clock signal and the theoretical frequency of a desired local clock signal, and a clock divider 120 for dividing the source clock signal by the dividing coefficient in order to obtain a desired local clock signal.
As shown in FIG. 2, a first digital device 201 with a first source clock signal may be required to communicate with a second digital device 202 with a second source clock signal in some applications. Because the two digital devices work in different time domains, the local clock signal required in the communication between the first and second digital device should be synchronized with both of the first and second source clock signal for successful communication.
However, if a local clock signal is generated from the first source clock signal, the local clock signal may not be synchronized with the second source clock signal, thereby arising errors in the communication. If the local clock signal is generated from the second source clock signal, the same problem may occur.
Thus, there is a need for techniques for synchronizing the local clock signal with both of the first and second source clock signal.